An unpolished silicon (or semiconductor) wafer supporting a plurality of rectifier structure comprising: a top layer of opposite polarity is formed for a p-n junction, the bottom layer of the same polarity is formed for the ohmic contact, the passivation layer of either glass or multiple layers of CVD films around the edge of the chip is used for the high voltage termination, the etched structure with multiple round, hexagon, stripe or other shapes for the Schottky contacts, the top metal for the Schottky contact as well as the ohmic contact to the top side of the wafer. |
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